Upgrading of Integration of Time to Digit Converter on a Single FPGA
نویسندگان
چکیده
A Time to Digit Converter (TDC), which can achieve resolution 50-60 picoseconds, is integrated on a single FPGA. Implementing a TDC on an FPGA provides not only higher precision and shorter dead time compared to traditional methods, but also higher scale of integration. As the system can be integrated into single chip, it is especially suitable for portable and satellite-borne system. Besides, the resolution is expected to be improved to less than 30 picoseconds. Principle of operation, architecture of the prototype, the construction of this TDC and the nonlinearity are presented in this paper.
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